Optical
Interconnects

Kuan-Chang Chen and Azita Emami, “ A 25Gb/s APD-Based Burst-Mode Optical Receiver with 2.24ns Reconfiguration Time in 28nm CMOS, IEEE Custom Integrated Circuits Conference (CICC) 2018.

[ PDF ]

A. Emami, “Optical Interconnects: Design and Analysis,” invited paper at the Optical Fiber Communication Conference (OFC), OSA Technical Digest (online) (Optical Society of America, 2017), paper W4I.1.

[ PDF ]

Mayank Raj, Saman Saeedi, Azita Emami “A Wideband Injection Locked Quadrature Clock Generation and Distribution Technique for an Energy-Proportional 16–32 Gb/s Optical Receiver in 28 nm FDSOI CMOS,” IEEE Journal of Solid-State Circuits, vol.51, no.10, pp.2446 – 2462, Oct. 2016.

[ PDF ]

Mayank Raj, Manuel Monge, Azita Emami “A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS,” IEEE Journal of Solid-State Circuits, vol.51, no.8, pp.1734 – 1743, July. 2016

[ PDF ]

Saman Saeedi, Azita Emami “A 10Gb/s, 342fJ/bit Micro-Ring Modulator Transmitter with Switched-Capacitor Pre-Emphasis and Monolithic Temperature Sensor in 65nm CMOS,” IEEE Symposium on VLSI Circuits, June 2016

[ PDF ]

S. Saeedi, S. Menezo, G. Pares, A. Emami, “A 25Gb/s 3D-Integrated CMOS/Silicon-Photonic Receiver for Low-Power High-Sensitivity Optical Communication,” IEEE Journal of Lightwave Technology, 2015.

[ PDF ]

M. Raj, M. Monge, A. Emami, “A 20Gb/s 0.77pJ/b VCSEL Transmitter with Nonlinear Equalization in 32nm SOI CMOS“, IEEE Custom Integrated Circuits Conference (CICC), 2015 (Best Student Paper Award-Second Place.)

[ PDF ]

S. Saeedi, B. Abiri, A. Hajimiri, A. Emami, “Differential Optical Ring Modulator: Breaking the Bandwidth/Quality-factor Trade-off“, 41st European Conference on Optical Communication (ECOC) , IEEE, 2015.

[ PDF ]

S. Saeedi, A. Emami, “Silicon-photonic PTAT temperature sensor for micro-ring resonator thermal stabilization,” Optics Express, vol.23, no.17, pp.21875-21883, Aug. 2015.

[ PDF ]

S. Saeedi, A. Emami, “Silicon-photonic PTAT temperature sensor for micro-ring resonator thermal stabilization,” IEEE European Conference on Optical Communication (ECOC), 2015.

[ PDF ]

S. Saeedi, S. Menezo and A. Emami, “A 25Gbps 3D-Integrated CMOS/Silicon Photonic Optical Receiver with -15dBm Sensitivity and 0.17pJ/bit Energy Efficiency“, IEEE Optical Interconnect Conference (OIC), 2015

[ PDF ]

M. Raj, S. Saeedi, A. Emami, “A 4-to-11GHz Injection-Locked Quarter-Rate Clocking for an Adaptive 153fJ/b Optical Receiver in 28nm FDSOI CMOS“, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2015

[ PDF ]

S. Saeedi, A. Emami, “A 25Gb/s 170μW/Gb/s High-Sensitivity Optical Receiver in 28nm CMOS for Low-power Optical Communication“, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2014.

[ PDF ]

M. Honarvar, A. Emami-Neyestanak, “24-Gb/s Double-Sampling Receiver for Ultra-Low-Power Optical Communication,” IEEE Journal of Solid-State Circuits, vol.48, no.2, pp.344-357, Feb. 2013.

[ PDF ]

M. Honarvar, A. Emami-Neyestanak, “Ultra Low-Power Receiver Design for Dense Optical Interconnects“, IEEE Optical Interconnects Conference (OIC), vol., no., pp.115-116, 20-23 May 2012.

[ PDF ]

M. Honarvar, A. Emami-Neyestanak, “An 18.6Gb/s Double-Sampling Receiver in 65nm CMOS for Ultra Low-power Optical Communication“, International Solid-State Cicruits Conference (ISSCC), 2012.

[ PDF ]

S. Palermo, A. Emami-Neyestanak, M. Horowitz, “A 90nm CMOS 16Gb/sTransceiver for Optical Interconnects“, IEEE Journal of Solid-State Circuits, vol.43, no.5, pp.1235-1246, May 2008.

[ PDF ]

S. Palermo, A. Emami-Neyestanak, M. Horowitz, “A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects“, IEEE International Solid-State Circuits Conference (ISSCC), Digest of tech. papers, 2007.

[ PDF ]

D. Miller, A. Bhatnagar, S. Palermo, A. Emami-Neyestanak, M. Horowitz, “Opportunities for Optics in Integrated Circuits Application“, IEEE International Solid-State Circuits Conference (ISSCC), 2005.

[ PDF ]

A. Emami-Neyestanak, S. Palermo, H. Lee and M. Horowitz, “CMOS Transceiver with Baud Rate Clock Recovery for Optical Interconnects“, IEEE Symposium on VLSI Circuits, June 2004.

[ PDF ]

A. Emami-Neyestanak, D. Liu, G. Keeler, N. Helman and M. Horowitz, “A 1.6 Gbps, 3mW CMOS Receiver for Optical Communication“, IEEE Symposium on VLSI Circuits, June 2002, pages 84-8.

[ PDF ]

Wearable and
Implantable Devices

Taige Wang, Mahsa Shoaran, Azita Emami, “Towards Adaptive Deep Brain Stimulation in Parkinson’s Disease: LFP-based Feature Analysis and Classification,” IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2018.

[ PDF ]

Abhinav Agarwal*, Aubrey Shapero*, Damien Roger, Mark Humayun, Yu-Chong Tai, Azita Emami, “A Wireless, Low-Drift, Implantable Intraocular Pressure Sensor with Parylene-on-oil Encapsulation”, IEEE Custom Integrated Circuits Conference (CICC) 2018 (* equal contribution)

[ PDF ]

M.Monge, A.Lee-Gosselin, M.Shapiro, and A.Emami, Localization of Microscale Devices In Vivo using Addressable Transmitters Operated as Magnetic Spins, Biomedical Engineering Society Annual Meeting (BMES), Oct. 2017.

[Proceedings]

[ PDF ]

M.Monge, A.Lee-Gosselin, M.Shapiro, and A.Emami, Localization of Microscale Devices In Vivo using Addressable Transmitters Operated as Magnetic Spins, Nature Biomedical Engineering 1, 736-744, Sep. 2017.

[ PDF ]

Abhinav Agarwal, Albert Gural, Manuel Monge, Dvin Adalian, Samson Chen, Axel Scherer, Azita Emami, “A 4μW, ADPLL-based implantable amperometric biosensor in 65nm CMOS ,” IEEE Symposium on VLSI Circuits, June 2017

[ PDF ]

M. Shoaran, B. A. Haghi, M. Farivar, A. Emami, “Efficient Feature Extraction and Classification Methods in Neural Interfaces,” The BRIDGE Magazine, National Academy of Engineering, winter 2017 edition

[ PDF ]

M. Shoaran, M. Farivar, A. Emami, “Hardware-Friendly Seizure Detection with a Boosted Ensemble of Shallow Decision Trees,” International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), Aug. 2016

[ PDF ]

M. Shoaran, M. Shahshahani, M. Farivar, J. Almajano, A. Shahshahani, A. Schmid, A. Bragin, Y. Leblebici, A. Emami, “A 16-Channel 1.1mm2 Implantable Seizure Control SoC with Sub-μW/Channel Consumption and Closed-Loop Stimulation in 0.18μm CMOS,” IEEE Symposium on VLSI Circuits, June 2016

[ PDF ]

M. Loh, A. Emami, “Capacitive Proximity Communication with Distributed Alignment Sensing for Origami Biomedical Implants,” IEEE Journal of Solid-State Circuits, vol.50, no.5, pp.1275-1286, May. 2015

[ PDF ]

M. Monge, A. Emami, “Design Considerations for High-Density Fully Intraocular Epiretinal Prostheses,”(Invited) IEEE Biomedical Circuits and Systems Conference (BIOCAS), 2014

[ PDF ]

M. Monge, M. Raj, M. Honorvar-Nazari, H.C. Chang, Y. Zhao, J. Weiland, M. Humayun, Y.C. Tai, A. Emami, “A Fully Intraocular High-Density Self-Calibrating Epiretinal Prosthesis,”(Invited) IEEE Transactions on Biomedical Circuits and Systems, vol.7, no.6, pp.747-760, Dec. 2013

[ PDF ]

M. Loh, A. Emami-Neyestanak, “Capacitive Proximity Communication with Distributed Alignment Sensing for Origami Biomedical Implants“, IEEE Custom Integrated Circuits Conference (CICC), 2013.

[ PDF ]

Y. Liu, J. Park, YC tai, R. Lang, A. Emami-Neyestanak, S. Pellegrino and M. Humayun, “Parylene Origami Structure for Intraocular Implantation“, IEEE Transducers Conference, 2013

[ PDF ]

M. Monge, M. Raj, M. Honorvar-Nazari, H.C. Chang, Y. Zhao, J. Weiland, M. Humayun, Y.C. Tai, A. Emami-Neyestanak, “A Fully Intraocular 0.0169mm2/pixel 512-Channel Self-Calibrating Epiretinal Prosthesis in 65nm CMOS“, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2013

[ PDF ]

J. Chang, Y. Liu, D. Kang, M. Monge, Y. Zhao, C.C. Yu, A. Emami-Neyestanak, J. Weiland, M. Humayun, Y.C. Tai, “Packaging Study for a 512-Channel Intraocular Epiretinal Implant“, IEEE International Conference on Micro Electro Mechanical Systems(MEMS), Jan. 2013

[ PDF ]

Wireline
Transceivers

M. Honarvar, A. Emami-Neyestanak, “A 20GB/s 136fJ/b 12.5Gb/s/μm On-Chip Link in 28nm CMOS“, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol., no., 2-4 June 2013

[ PDF ]

M. Honarvar, A. Emami-Neyestanak, “A 15-Gb/s 0.5-mW/Gbps Two-Tap DFE Receiver With Far-End Crosstalk Cancellation“, IEEE Journal of Solid-State Circuits, vol.47, no.10, pp.2420-2432, Oct. 2012

[ PDF ]

M. Honarvar, A. Emami-Neyestanak, “A Low-Power 20Gb/s Transmitter in 65nm CMOS Technology“, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol., no., pp.149-152, 17-19 June 2012

[ PDF ]

M. Honarvar, A. Emami-Neyestanak, “A 15Gb/s 0.5mW/Gb/s 2-Tap DFE Receiver with Far-End Crosstalk Cancellation“, International Solid-State Cicruits Conference (ISSCC), 2011

[ PDF ]

M. Loh, A. Emami, “All-Digital CDR for High-Density, High-Speed I/O“, IEEE Symposium on VLSI Circuits, 2010

[ PDF ]

A. Emami-Neyestanak, A. Varzaghani, J. Bulzacchelli, A. Rylyakov, C.-K.K. Yang, D. Friedman, “A Low-Power Receiver with Switched-Capacitor Summation DFEIEEE Symposium on VLSI Circuits, Digest of tech. papers, 2006

[ PDF ]

A. Emami-Neyestanak, A. Varzaghani, J. Bulzacchelli, A. Rylyakov, C.-K.K. Yang and Daniel Friedman “A 6.0 mW, 10.0 Gb/s Receiver with Switched-Capacitor Summation DFE,”(Invited) IEEE Journal of Solid-State Circuits, vol.42, no.4, pp.889-896, April 2007

[ PDF ]

Clocking &
Synchronization

Mayank Raj, Saman Saeedi, Azita Emami “A Wideband Injection Locked Quadrature Clock Generation and Distribution Technique for an Energy-Proportional 16–32 Gb/s Optical Receiver in 28 nm FDSOI CMOS,” IEEE Journal of Solid-State Circuits, vol.51, no.10, pp.2446 – 2462, Oct. 2016.

[ PDF ]

S. Saeedi, A. Emami, “An 8GHz First-order Frequency Synthesizer for Low-Power On-Chip Clock Generation“, IEEE Journal of Solid-state Circuits, vol. 50, no. 8, pp. 1848-1860, Aug. 2015

[ PDF ]

M. Raj, S. Saeedi, A. Emami, “A 4-to-11GHz Injection-Locked Quarter-Rate Clocking for an Adaptive 153fJ/b Optical Receiver in 28nm FDSOI CMOS“, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2015

[ PDF ]

M. Raj, A. Emami, “A Wideband Injection Locking Scheme and Quadrature Phase Generation in 65nm CMOS,”(Invited) IEEE Transactions on Microwave Theory and Techniques, vol.62, no.4, pp.763-772, Apr. 2014

[ PDF ]

S. Saeedi, A. Emami, “An 8GHz First-order Frequency Synthesizer based on Phase Interpolation and Quadrature Frequency Detection in 65nm CMOS“, IEEE Custom Integrated Circuits Conference (CICC), 2014

[ PDF ]

M. Raj, A. Emami-Neyestanak, “A Wideband Injection Locking Scheme and Quadrature Phase Generation in 65nm CMOS“, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol., no., 2-4 June 2013

[ PDF ]

M. Loh, A. Emami-Neyestanak, “A 3×9 Gb/s Shared, All-Digital CDR for High-Speed, High-Density I/O“, IEEE Journal of Solid-State Circuits, vol.47, no.3, March 2012

[ PDF ]

M. Loh, A. Emami, “All-Digital CDR for High-Density, High-Speed I/O“, IEEE Symposium on VLSI Circuits, 2010

[ PDF ]

S. Palermo, A. Emami-Neyestanak, M. Horowitz, “A 90nm CMOS 16Gb/sTransceiver for Optical Interconnects“, IEEE Journal of Solid-State Circuits, vol.43, no.5, pp.1235-1246, May 2008

[ PDF ]

A. Emami-Neyestanak, S. Palermo, H. Lee and M. Horowitz, “CMOS Transceiver with Baud Rate Clock Recovery for Optical Interconnects“, IEEE Symposium on VLSI Circuits, June 2004

[ PDF ]

Signal Acquisition
Beyond Nyquist Rate

J. Yoo, C. Turnes, E. Nakamura, C. Le, S. Becker, E. Sovero, M. Wakin, M. Grant, J. Romberg, A. Emami-Neyestanak, and E. Candès, “A Compressed Sensing Parameter Extraction Platform for Radar Pulse Signal Acquisition“, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol.2, no.3, pp.626-638, Sept. 2012

[ PDF ]

M. Wakin, S. Becker, E. Nakamura, M. Grant, E. Sovero, D. Ching, J. Yoo, J. Romberg, A. Emami-Neyestanak, and E. Candès, “A Nonuniform Sampler for Wideband Spectrally-Sparse Environments“, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol.2, no.3, pp.516-529, Sept. 2012

[ PDF ]

J. Yoo, S. Becker, M. Loh, M. Monge, E. Candès, A. Emami-Neyestanak, “A 100MHz-2GHz 12.5x sub-Nyquist Rate Receiver in 90nm CMOS“, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2012

[ PDF ]

J. Yoo, S. Becker, M. Loh, M. Monge, E. Candès, A. Emami-Neyestanak, “Design and Implementation of a Fully Integrated Compressed-Sensing Signal Acquisition System“, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2012

[ PDF ]

J. Yoo, A. Khajehnejad, B. Hassibi, A. Emami-Neyestanak “An Analog Sub-Linear Time Sparse Signal Acquisition Framework Based on Structured Matrices“, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2012

[ PDF ]